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Contents |
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I. |
Organization, Hardware and Policies |
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1. Introduction
2. Calendar for the Quarter
3. Location and Time Slots
4. Laboratory Groups
5. Laboratory Grading
6. Electronic Instrumentation
7. Parts Kits
8. Replacement Parts
9. Laboratory Notebooks
10. How to Use the Experimental Procedures
11. Errata, Improvements, and Acknowledgements |
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5
6
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7
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15
19
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21 |
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II. |
The Experiments |
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0. |
Laboratory Preliminaries and Data
Acquisition using LabVIEW |
(E0) |
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P1. Transformer voltages
P2. Internal resistance of the lab transformer
P3. Create a curve tracer with your oscilloscope!
P4. Oscilloscope input resistance
P5. When is a wire not a wire?
P6. Temperature measurement using LabVIEW and DAQ hardware
P7. Adding a Celsius to Fahrenheit conversion
P8. Saving the measurement results to spreadsheet files |
E0.3
E0.5
E0.7
E0.9
E0.10
E0.12
E0.17
E0.18 |
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1. |
2-Terminal Device Characteristics and Diode
Characterization |
(E1) |
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P1. Measurement of diode reverse leakage current
P2. Measurement of diode forward turn-on voltage
P3. Measurement of diode I-V characteristics using the oscilloscope
P4. Effect of series and parallel resistances
P5. Measurement of diode I-V characteristics using LabVIEW
P6. Measurement of a zener diode
P7. Characterization of a light-emitting diode (LED)
P8. Characterization of a photoconductive cell
P9. Diode switching transients |
E1.2
E1.4
E1.6
E1.9
E1.11
E1.16
E1.17
E1.18
E1.19 |
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2. |
Diode Circuit Applications |
(E2) |
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P1. Voltage clipper circuits
P2. Voltage limiter circuits
P3. Precision half-wave rectifier
P4. Half-wave rectifier and capacitive filtering
P5. Full-wave bridge rectifier and capacitive filtering
P6. Zener diode voltage regulator
P7. Voltage clamper circuits
P8. Voltage multiplier circuits |
E2.1
E2.4
E2.6
E2.7
E2.9
E2.11
E2.13
E2.14 |
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3. |
JFET and MOSFET Characterization |
(E3) |
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P1. Discrete MOSFET lead, sex, and mode identification
P2. Integrated MOSFET lead, sex, and mode identification
P3. Measurement of a MOSFET using a LabVIEW curve tracer
P4. Measurement of CMOS pairs using a LabVIEW curve tracer
P5. Output conductance effects
P6. JFET gate lead, sex, and mode identification
P7. Measurement of a JFET using a LabVIEW curve tracer
P8. JFET variable attenuator |
E3.3
E3.7
E3.10
E3.15
E3.18
E3.19
E3.20
E3.22 |
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4. |
FET Driver, Load, and Switch Circuits |
(E4) |
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P1. E-mode MOSFET driver with resistor load
P2. E-mode MOSFET driver with D-mode load device
P3. D-mode JFET driver with resistor load
P4. CMOS inverter circuit
P5. CMOS Schmitt trigger circuit
P6. Create a VTC curve tracer using LabVIEW and DAQ hardware
P7. CMOS inverter VTC measured using a LabVIEW curve tracer
P8. 3-input CMOS NAND gate
P9. CMOS analog switch characteristics
P10. CMOS analog switch logic circuits
P11. Flying capacitor voltage inverter
P12. Voltage step-up switch-mode power supply
P13. Sample and hold gate |
E4.3
E4.6
E4.7
E4.8
E4.9
E4.11
E4.17
E4.19
E4.20
E4.23
E4.25
E4.27
E4.29 |
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5. |
CMOS Timing, Logic, and Memory Circuits |
(E5) |
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P1. NAND and NOR gate truth table verification
P2. Manual combinatorial logic analyzer using LabVIEW
P3. Automatic combinatorial logic analyzer using LabVIEW
P4. Non-latching monostable circuit
P5. Latching monostable circuit
P6. CMOS square wave oscillator
P7. Logic function implementation design
P8. Hardwired D-type flip-flop
P9. Asynchronous frequency divider circuits
P10. Synchronous finite state machine
P11. Push-on/push-off circuit
P12. CMOS ring oscillator |
E5.2
E5.6
E5.9
E5.12
E5.14
E5.16
E5.18
E5.19
E5.20
E5.22
E5.25
E5.27 |
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III. |
The Design Project: |
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Information and Guidelines |
(D1) |
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1. Overview of Electronic Circuit Design
2. Design Project Guidelines
3. Design Project Documentation |
D1.1
D1.3
D1.4 |